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Design modelling for the semiconductor industry

European competitiveness in the constantly evolving global electronics market has been boosted thanks to new methods and tools that enable greater supply coordination and faster delivery of quality products.

The OpenES project, supported through Eureka’s CATRENE Cluster, developed a design modelling kit that can be adopted by semiconductor and system design companies to increase productivity and product quality. The benefits of this suite of OpenES technologies were quantitatively measured in five case studies, showing up to 33 % in manpower savings.

Market potential

“OpenES will have a positive impact on European industry,” says project leader Laurent Maillet-Contoz from STMicroelectronics in France. “The technologies developed have been shown to reduce time-to-market and enable partners to deliver faster, better and more optimised products.”

Several new tools and updates have already been implemented and are now available for commercial use, expanding market opportunities for several project partners. “The OpenES project has also been an excellent vehicle to extend and enhance the modelling kit we have developed to support pre-silicon activities,” says Maillet-Contoz. “A distribution agreement with a partner has been extended to also cover new technologies developed during OpenES.”

An ecosystem based on open standards will avoid the need for expensive in-house development and tools.

The project has not only helped to foster close cooperation between project partners, but also push European research in the direction of electronic design automation. “One interesting outcome of OpenES has been the fact that a key researcher who carried out parts of this work has successfully applied for a PhD,” adds Dr Markus Pistauer, CEO of project partner CISC Semiconductor in Austria. “The end result will be part of a new software product offered by CISC Semiconductor.” Other new interesting cooperation possibilities have been launched between CISC Semiconductor, Graz University of Technology and ST Microelectronics.

Joined up thinking

The OpenES project brought together a range of European partners in order to develop open electronic design and verification technologies. A key objective was to build design frameworks and standard interfaces wherever possible in order to improve cooperation IP providers and system integrators.

“Enhancing system-level design will reduce development costs by improving cooperation between system developers and semiconductor companies,” says Maillet-Contoz. “An ecosystem based on open standards will avoid the need for expensive in-house development and tools.”

New innovative product architectures will help to increase efficiency in product design with less redesigns, reduced system development costs and faster time-to-market. “This project will also contribute towards maintaining state-of-the-art technologies at universities and research institutes, ensuring high education standards for undergraduates and doctorate candidates in the future,” adds Maillet-Contoz.

By defining a new set of tools and methods for semiconductor manufacturers, the OpenES project has put in place cutting edge design flow standards that European SMEs can aspire to. Everything made by the nearly $1 trillion electronics industry (from silicon chips to satellites) results from designers using electronic design automation (EDA) tools and services. As electronics become even more complex and pervasive, the EDA industry is more vital to the continued success of the global economy.

Raising the productivity and competitiveness of European businesses through technology. Boosting national economies on the international market, and strengthening the basis for sustainable prosperity and employment.