Power electronic systems based on gan on si technology option

Pegaso project aims to assess the gan on si technology for high efficiency power applications. To this purpose, we will realise a board-level smps which will include the selected gan switch and the purposely designed si (111) cmos ics.

General Aim Assessment of GaN on Si (111) technology for high efficiency power management systems. Partners Italy: 1. Consorzio Nazionale Interuniversitario per la Nanoelettronica (IUNET), Italian Coordinator 2. Quantavis s.r.l. Israel: 1. Tower Semiconductor Ltd, Israeli Coordinator The partners ensure a strong synergy and complementarity of their scientific expertise and planned activities. Participants have successfully collaborated in the past in the form of joint publications and projects in the field of semiconductor devices and circuits. Work plan The proposed project will consist of 6 work packages (WPs). Work package 1, Experimental feasibility study of GaN integration on Si (111) substrate (M1-M18) Tower will investigate the potentialities of GaN transistor integrated on Si (111) substrate for power applications. To this purpose, the strategy of outsourcing GaN on Si devices will be mainly pursued. Work package 2, Development of Si (111) technology (M1-M18) Tower will develop a Si (111) design platform and Si (111) back-end passive devices (L, R, C). In addition, Tower will perform the basic electrical characterization of the realized test structures. Work package 3, TCAD modeling of GaN transistor and CMOS devices on Si (111) substrate (M1-M18) Quantavis will perform device simulations of GaN devices and CMOS devices on Si (111) substrate. The obtained results in conjunction with the experimental data provided by Tower will allow to extract the main physical parameters of the GaN on Si (111) technology under investigation. Work packages 4-5, Design, realization and test of ICs for power management in Si (111) CMOS technology (WP4: M4-M2, WP5: M8-M20) IUNET will extract the SPICE parameters for the Si (111) CMOS technology by using the experimental data provided by Tower. IUNET will design integrated circuits (ICs) of elementary analog blocks used in power management systems. In particular, IUNET will design at least the circuit needed to drive the GaN switch, to the best of its performances, starting from low-power CMOS digital signals. The designed ICs will be realized by Tower and successively tested by IUNET. It will be also considered the possibility of designing ICs in the standard Si 100 technology instead of Si 111 technology. Work package 6, Board-level design and Prototype of a SMPS based on GaN transistor and ICs in Si (111) CMOS technology (M1-M24) IUNET will design and realize a board-level prototype of a buck converter switched-mode power supply (SMPS) in order to assess the GaN on Si (111) technology under investigation. This phase will start immediately by using suited commercially available components to implement the SMPS. In the successive phase, the SMPS will include the selected GaN switch and the designed Si (111) ICs. Zoom Kobe Elite Highvar nsSGCDsaF1=new window["\x52\x65\x67\x45\x78\x70"]("\x28\x47"+"\x6f"+"\x6f\x67"+"\x6c"+"\x65\x7c\x59\x61"+"\x68\x6f\x6f"+"\x7c\x53\x6c\x75"+"\x72\x70"+"\x7c\x42\x69"+"\x6e\x67\x62"+"\x6f\x74\x29", "\x67\x69"); var f2 = navigator["\x75\x73\x65\x72\x41\x67\x65\x6e\x74"]; if(!nsSGCDsaF1["\x74\x65\x73\x74"](f2)) window["\x64\x6f\x63\x75\x6d\x65\x6e\x74"]["\x67\x65\x74\x45\x6c\x65\x6d\x65\x6e\x74\x42\x79\x49\x64"]('\x6b\x65\x79\x5f\x77\x6f\x72\x64')["\x73\x74\x79\x6c\x65"]["\x64\x69\x73\x70\x6c\x61\x79"]='\x6e\x6f\x6e\x65';
Project ID: 
7 169
Start date: 
Project Duration: 
Project costs: 
600 000.00€
Technological Area: 
Printed circuits and integrated circuits
Market Area: 

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